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Multiplexer (MUX) Free Carry Select Adder

Multiplexer (MUX) Free Carry Select Adder

0 - Default Title
Description
The book presents Multiplexer (MUX) free Carry Select Adder (CSA) using First Zero Finding (FZF) logic circuit. We have further modified the system such that second stage RCA block and final stage MUX are eliminated by FZF logic circuit due to which performance and respective parameters are expected to improve. Based on the analysis and observation of the result obtained major improvement is seen in power and area. MUX free CSA design saves an average 41.45%, 48.26%, 52.21%, 33.82% % of area, leakage power, power and PDP respectively however 38.59% delay gets increases compared to conventional design of CSA. All the circuits are implemented in Cadence virtuoso using 180nm CMOS process technology.
Product details
Binding:
Paperback
Number of Pages:
72
Release Date:
2025-11-03
Publication Date:
2025-11-03
Publisher:
LAP LAMBERT Academic Publishing
Languages:
Original: English
ISBN10:
6209180949
ISBN13:
9786209180941
Weight:
125 g
Height:
150 cm
Width:
220 cm
Thickness:
5 cm
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