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VHDL for Engineers

VHDL for Engineers

0 - Default Title
Description
Suitable for use in a one- or two-semester course for computer and electrical engineering majors.VHDL for Engineers teaches readers how to design and simulate digital systems using the hardware description language, VHDL. These systems are designed for implementation using programmable logic devices (PLDs) such as complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs). The book focuses on writing VHDL design descriptions and VHDL testbenches. The steps in VHDL/PLD design methodology are also a key focus. Short presents the complex VHDL language in a logical manner, introducing concepts in an order that allows the readers to begin producing synthesizable designs as soon as possible.
Product details
Binding:
Paperback
Edition:
1
Number of Pages:
720
Release Date:
2013-11-01
Publication Date:
2013-11-01
Publisher:
Pearson
Languages:
Original: English
ISBN10:
1292042753
ISBN13:
9781292042756
GPSR Manufacturer Reference:
Weight:
1230 g
Height:
178 cm
Width:
235 cm
Thickness:
39 cm
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