Placeholder text

Digital VLSI Design with Verilog

Product Image: Digital VLSI Design with Verilog

Digital VLSI Design with Verilog

0 - Default Title
Description
This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book. A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test. A concluding presentation of special topics includes System Verilog and Verilog-AMS.
Product details
Edition:
2
Number of Pages:
572
Release Date:
2014-07-08
Publication Date:
2014-07-08
Publisher:
Springer
Languages:
Original: English
ISBN10:
3319047884
ISBN13:
9783319047881
GPSR Manufacturer Reference:
Weight:
1016 g
Height:
160 cm
Width:
241 cm
Thickness:
37 cm
Currently sold out