Placeholder text

Go to cart

Efficient Test Methodologies for High-Speed Serial Links

Efficient Test Methodologies for High-Speed Serial Links Computer Science

Efficient Test Methodologies for High-Speed Serial Links

0 - Default Title
Description
With the increasing demand for higher data bandwidth, communication systems' data rates have reached the multi-gigahertz range and even beyond. Advances in semiconductor technologies have accelerated the adoption of high-speed serial interfaces, such as PCI-Express, Serial-ATA, and XAUI, in order to mitigate the high pin-count and the data-channel skewing problems. However, with the increasing number of I/O pins and greater data rates, significant challenges arise for testing high-speed interfaces in terms of test cost and quality, especially in high volume manufacturing (HVM) environments. Efficient Test Methodologies for High-Speed Serial Links describes in detail several new and promising techniques for cost-effectively testing high-speed interfaces with a high test coverage. One primary focus of Efficient Test Methodologies for High-Speed Serial Links is on efficient testing methods for jitter and bit-error-rate (BER), which are widely used for quantifying the quality of a communication system. Various analysis as well as experimental results are presented to demonstrate the validity of the presented techniques.
Product details
Edition:
1
Number of Pages:
98
Release Date:
2003-11-14
Publication Date:
2009-12-07
Publisher:
Springer
Languages:
Original: English
ISBN10:
9048134420
ISBN13:
9789048134427
GPSR Manufacturer Reference:
[email protected]
Weight:
317 g
Height:
164 cm
Width:
244 cm
Thickness:
18 cm
Buy on Amazon
Currently sold out