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Self timed Null Convention Logic Approaches

By Avala, Mallikarjuna Prasad

Self timed Null Convention Logic Approaches

0 - Default Title
Description
Nowadays, the design of low power compact designs grabs higher attention. Hence, Low power gadgets finds more demand. Clock is the main source for power consumption. Lot of research is going on in the design of clock less architectures. Self timed approaches are the best choice in this aspect. Glitches will contribute significantly for the total power consumption. With the aid of self timed Delay Insensitive approaches, differential path delays can be eliminated and hence glitch power can be nullified.
Product details
Binding:
Paperback
Number of Pages:
156
Release Date:
2025-11-03
Publication Date:
2025-11-03
Publisher:
LAP LAMBERT Academic Publishing
Languages:
Original: English
ISBN10:
6209177433
ISBN13:
9786209177439
Weight:
250 g
Height:
150 cm
Width:
220 cm
Thickness:
10 cm
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