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Advanced HDL Synthesis and SOC Prototyping: RTL Design Using Verilog

Product Image: Advanced HDL Synthesis and SOC Prototyping: RTL Design Using Verilog

Advanced HDL Synthesis and SOC Prototyping: RTL Design Using Verilog

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Product details
Edition:
1
Number of Pages:
328
Release Date:
2019-01-18
Publication Date:
2019-01-18
Publisher:
Springer
Languages:
Published: English, Original: English
ISBN10:
981108775X
GPSR Manufacturer Reference:
Weight:
640 g
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